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Programming Multicore and Many-Core Computing Systems.

By: Contributor(s): Material type: TextTextSeries: Wiley Series on Parallel and Distributed Computing SeriesPublisher: Newark : John Wiley & Sons, Incorporated, 2017Copyright date: ©2017Edition: 1st edDescription: 1 online resource (521 pages)Content type:
  • text
Media type:
  • computer
Carrier type:
  • online resource
ISBN:
  • 9781119331995
Subject(s): Genre/Form: Additional physical formats: Print version:: Programming Multicore and Many-Core Computing SystemsDDC classification:
  • 005.2/75
LOC classification:
  • QA76.642.P767 2017
Online resources:
Contents:
Cover -- Title Page -- Copyright -- Contents -- List of Contributors -- Preface -- Acknowledgements -- Acronyms -- Part I Foundations -- Chapter 1 Multi- and Many-Cores, Architectural Overview for Programmers -- 1.1 Introduction -- 1.2 Why Multicores? -- 1.3 Homogeneous Multicores -- 1.4 Heterogeneous Multicores -- 1.5 Concluding Remarks -- References -- Chapter 2 Programming Models for MultiCore and Many-Core Computing Systems -- 2.1 Introduction -- 2.2 A Comparative Analysis of Many - Cores -- 2.3 Programming Models Features -- 2.4 Programming Models for Many-Cores -- 2.5 An Overview of Many-Core Programming Models -- 2.6 Concluding Remarks -- References -- Chapter 3 Lock-free Concurrent Data Structures -- 3.1 Introduction -- 3.2 Synchronization Primitives -- 3.3 Lock-Free Data Structures -- 3.4 Memory Management for Concurrent Data Structures -- 3.5 Graphics Processors -- References -- Chapter 4 Software Transactional Memory -- 4.1 Introduction -- 4.2 STM: A Programmer's Perspective -- 4.3 Transactional Semantics -- 4.4 STM Design Space -- 4.5 STM: A Historical Perspective -- 4.6 Application Performance on STM -- 4.7 Concluding Remarks -- References -- Part II Programming Approaches -- Chapter 5 Hybrid/Heterogeneous Programming with OmpSs and its Software/Hardware Implications -- 5.1 Introduction -- 5.2 The OMPSS Proposal -- 5.3 Implementation -- 5.4 Task Granularity -- 5.5 Related Work -- 5.6 Future Work -- 5.7 Concluding Remarks -- Acknowledgments -- References -- Chapter 6 Skeleton Programming for Portable Many-Core Computing -- 6.1 Introduction -- 6.2 Background: Skeleton Programming -- 6.3 Skepu: A Tunable Skeleton Programming Library -- 6.4 Skelcl: A Library for High-Level Multi-Gpu Programming -- 6.5 Related Work -- 6.6 Concluding Remarks and Future Work -- References -- Chapter 7 DSL Stream Programming on Multicore Architectures.
7.1 Introduction -- 7.2 A High-Level DSL: SLICES -- 7.3 Intermediary Representation SJD -- 7.4 Optimizing the Intermediate Representation -- 7.5 Reducing Intercore Communication Cost -- 7.6 Evaluation -- 7.7 Conclusion -- References -- Chapter 8 Programming with Transactional Memory -- 8.1 Introduction -- 8.2 Concurrency Made Simple -- 8.3 TM Language Constructs -- 8.4 Implementing A TM -- 8.5 Performance Limitations -- 8.6 Recent Solutions -- 8.7 Concluding Remarks -- Acknowledgments -- References -- Chapter 9 Object-Oriented Stream Programming -- 9.1 Stream Programming -- 9.2 Object-Oriented Stream Programming -- 9.3 XJAVA -- 9.4 Performance -- 9.5 Experiences -- 9.6 Related Work -- 9.7 Future Work -- 9.8 Summary -- References -- Chapter 10 Software-Based Speculative Parallelization -- 10.1 Introduction -- 10.2 Speculative Execution in Cord -- 10.3 Advanced Features of Cord -- 10.4 Related Work -- 10.5 Future Work -- 10.6 Concluding Remarks -- References -- Chapter 11 Autonomic Distribution and Adaptation -- 11.1 Introduction -- 11.2 Parallel Programming Models -- 11.3 Concurrent Code -- 11.4 Conclusions -- References -- Part III Programming Frameworks -- Chapter 12 PEPPHER: Performance Portability and Programmability for Heterogeneous Many-Core Architectures -- 12.1 Introduction and Background -- 12.2 The Peppher Framework -- 12.3 The Peppher Methodology -- 12.4 Performance Guidelines and Portability -- 12.5 Further Technical Aspects -- 12.6 Guiding Applications and Benchmarks -- 12.7 Conclusion -- References -- Chapter 13 Fastflow: High-Level and Efficient Streaming on Multicore -- 13.1 Fastflow Principles -- 13.2 Fastflow μ-Tutorial -- 13.3 Performance -- 13.4 Related Work -- 13.5 Future Work and Conclusions -- References -- Chapter 14 Parallel Programming Framework for H.264/AVC Video Encoding in Multicore Systems -- 14.1 Introduction.
14.2 Parallel Programming Framework for H.264/AVC Video Encoding -- 14.3 Programming Parallel H.264 Video Encoders -- 14.4 Evaluation of Parallel H.264 Video Encoders -- 14.5 Concluding Remarks -- Acknowledgments -- References -- Chapter 15 Parallelizing Evolutionary Algorithms on GPGPU Cards with the EASEA Platform -- 15.1 Introduction -- 15.2 Easea Parallelization of EA on GPGPU -- 15.3 Experiments and Applications -- 15.4 Conclusion -- References -- Part IV Testing, Evaluation and Optimization -- Chapter 16 Smart Interleavings for Testing Parallel Programs -- 16.1 Introduction -- 16.2 Reviews of Parallel Programs -- 16.3 Testing of Parallel Programs -- 16.4 Related Work -- 16.5 Future Work -- 16.6 Concluding Remarks -- References -- Problems -- Chapter 17 Parallel Performance Evaluation and Optimization -- 17.1 Sequential Versus Parallel Performance -- 17.2 Thread Overheads -- 17.3 Cache Coherence Overheads -- 17.4 Synchronization Overheads -- 17.5 Nonuniform Memory Access -- 17.6 Overlapping Latency -- 17.7 Diagnostic Tools and Techniques -- 17.8 Summary -- References -- Chapter 18 A Methodology for Optimizing Multithreaded System Scalability on Multicores -- 18.1 Introduction -- 18.2 Multithreading and Scalability -- 18.3 Controlled Performance Measurements -- 18.4 Workload Design and Implementation -- 18.5 Quantifying Scalability -- 18.6 Case Study: Memcached Scalability -- 18.7 Other Multithreaded Applications -- 18.8 Case Study: Data Validation -- 18.9 Scalability on Many-Core Architectures -- 18.10 Future Work -- 18.11 Concluding Remarks -- References -- Chapter 19 Improving Multicore System Performance through Data Compression -- 19.1 Introduction -- 19.2 Our Approach -- 19.3 Experimental Evaluation -- 19.4 Related Work -- 19.5 Future Work -- 19.6 Concluding Remarks -- References -- Part V Scheduling and Management.
Chapter 20 Programming and Managing Resources on Accelerator-Enabled Clusters -- 20.1 Introduction -- 20.2 Programming Accelerators on Large-Scale Clusters -- 20.3 Mapreduce for Heterogeneous Clusters -- 20.4 Resource Configuration -- 20.5 Resource Management on Clusters with Accelerators -- 20.6 Evaluation -- 20.7 Conclusion -- References -- Chapter 21 An Approach for Efficient Execution of SPMD Applications on Multicore Clusters -- 21.1 Introduction -- 21.2 SPMD Applications on Multicore Clusters -- 21.3 Methodology for Efficient Execution -- 21.4 Scalability and Efficiency of SPMD Applications -- 21.5 SPMD Applications and Performance Evaluation -- 21.6 Related Works -- 21.7 Conclusion and Future Works -- References -- Chapter 22 Operating System and Scheduling for Future Multicore and Many-Core Platforms -- 22.1 Introduction -- 22.2 Operating System Kernel Models -- 22.3 Scheduling -- References -- Glossary -- Index.
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Cover -- Title Page -- Copyright -- Contents -- List of Contributors -- Preface -- Acknowledgements -- Acronyms -- Part I Foundations -- Chapter 1 Multi- and Many-Cores, Architectural Overview for Programmers -- 1.1 Introduction -- 1.2 Why Multicores? -- 1.3 Homogeneous Multicores -- 1.4 Heterogeneous Multicores -- 1.5 Concluding Remarks -- References -- Chapter 2 Programming Models for MultiCore and Many-Core Computing Systems -- 2.1 Introduction -- 2.2 A Comparative Analysis of Many - Cores -- 2.3 Programming Models Features -- 2.4 Programming Models for Many-Cores -- 2.5 An Overview of Many-Core Programming Models -- 2.6 Concluding Remarks -- References -- Chapter 3 Lock-free Concurrent Data Structures -- 3.1 Introduction -- 3.2 Synchronization Primitives -- 3.3 Lock-Free Data Structures -- 3.4 Memory Management for Concurrent Data Structures -- 3.5 Graphics Processors -- References -- Chapter 4 Software Transactional Memory -- 4.1 Introduction -- 4.2 STM: A Programmer's Perspective -- 4.3 Transactional Semantics -- 4.4 STM Design Space -- 4.5 STM: A Historical Perspective -- 4.6 Application Performance on STM -- 4.7 Concluding Remarks -- References -- Part II Programming Approaches -- Chapter 5 Hybrid/Heterogeneous Programming with OmpSs and its Software/Hardware Implications -- 5.1 Introduction -- 5.2 The OMPSS Proposal -- 5.3 Implementation -- 5.4 Task Granularity -- 5.5 Related Work -- 5.6 Future Work -- 5.7 Concluding Remarks -- Acknowledgments -- References -- Chapter 6 Skeleton Programming for Portable Many-Core Computing -- 6.1 Introduction -- 6.2 Background: Skeleton Programming -- 6.3 Skepu: A Tunable Skeleton Programming Library -- 6.4 Skelcl: A Library for High-Level Multi-Gpu Programming -- 6.5 Related Work -- 6.6 Concluding Remarks and Future Work -- References -- Chapter 7 DSL Stream Programming on Multicore Architectures.

7.1 Introduction -- 7.2 A High-Level DSL: SLICES -- 7.3 Intermediary Representation SJD -- 7.4 Optimizing the Intermediate Representation -- 7.5 Reducing Intercore Communication Cost -- 7.6 Evaluation -- 7.7 Conclusion -- References -- Chapter 8 Programming with Transactional Memory -- 8.1 Introduction -- 8.2 Concurrency Made Simple -- 8.3 TM Language Constructs -- 8.4 Implementing A TM -- 8.5 Performance Limitations -- 8.6 Recent Solutions -- 8.7 Concluding Remarks -- Acknowledgments -- References -- Chapter 9 Object-Oriented Stream Programming -- 9.1 Stream Programming -- 9.2 Object-Oriented Stream Programming -- 9.3 XJAVA -- 9.4 Performance -- 9.5 Experiences -- 9.6 Related Work -- 9.7 Future Work -- 9.8 Summary -- References -- Chapter 10 Software-Based Speculative Parallelization -- 10.1 Introduction -- 10.2 Speculative Execution in Cord -- 10.3 Advanced Features of Cord -- 10.4 Related Work -- 10.5 Future Work -- 10.6 Concluding Remarks -- References -- Chapter 11 Autonomic Distribution and Adaptation -- 11.1 Introduction -- 11.2 Parallel Programming Models -- 11.3 Concurrent Code -- 11.4 Conclusions -- References -- Part III Programming Frameworks -- Chapter 12 PEPPHER: Performance Portability and Programmability for Heterogeneous Many-Core Architectures -- 12.1 Introduction and Background -- 12.2 The Peppher Framework -- 12.3 The Peppher Methodology -- 12.4 Performance Guidelines and Portability -- 12.5 Further Technical Aspects -- 12.6 Guiding Applications and Benchmarks -- 12.7 Conclusion -- References -- Chapter 13 Fastflow: High-Level and Efficient Streaming on Multicore -- 13.1 Fastflow Principles -- 13.2 Fastflow μ-Tutorial -- 13.3 Performance -- 13.4 Related Work -- 13.5 Future Work and Conclusions -- References -- Chapter 14 Parallel Programming Framework for H.264/AVC Video Encoding in Multicore Systems -- 14.1 Introduction.

14.2 Parallel Programming Framework for H.264/AVC Video Encoding -- 14.3 Programming Parallel H.264 Video Encoders -- 14.4 Evaluation of Parallel H.264 Video Encoders -- 14.5 Concluding Remarks -- Acknowledgments -- References -- Chapter 15 Parallelizing Evolutionary Algorithms on GPGPU Cards with the EASEA Platform -- 15.1 Introduction -- 15.2 Easea Parallelization of EA on GPGPU -- 15.3 Experiments and Applications -- 15.4 Conclusion -- References -- Part IV Testing, Evaluation and Optimization -- Chapter 16 Smart Interleavings for Testing Parallel Programs -- 16.1 Introduction -- 16.2 Reviews of Parallel Programs -- 16.3 Testing of Parallel Programs -- 16.4 Related Work -- 16.5 Future Work -- 16.6 Concluding Remarks -- References -- Problems -- Chapter 17 Parallel Performance Evaluation and Optimization -- 17.1 Sequential Versus Parallel Performance -- 17.2 Thread Overheads -- 17.3 Cache Coherence Overheads -- 17.4 Synchronization Overheads -- 17.5 Nonuniform Memory Access -- 17.6 Overlapping Latency -- 17.7 Diagnostic Tools and Techniques -- 17.8 Summary -- References -- Chapter 18 A Methodology for Optimizing Multithreaded System Scalability on Multicores -- 18.1 Introduction -- 18.2 Multithreading and Scalability -- 18.3 Controlled Performance Measurements -- 18.4 Workload Design and Implementation -- 18.5 Quantifying Scalability -- 18.6 Case Study: Memcached Scalability -- 18.7 Other Multithreaded Applications -- 18.8 Case Study: Data Validation -- 18.9 Scalability on Many-Core Architectures -- 18.10 Future Work -- 18.11 Concluding Remarks -- References -- Chapter 19 Improving Multicore System Performance through Data Compression -- 19.1 Introduction -- 19.2 Our Approach -- 19.3 Experimental Evaluation -- 19.4 Related Work -- 19.5 Future Work -- 19.6 Concluding Remarks -- References -- Part V Scheduling and Management.

Chapter 20 Programming and Managing Resources on Accelerator-Enabled Clusters -- 20.1 Introduction -- 20.2 Programming Accelerators on Large-Scale Clusters -- 20.3 Mapreduce for Heterogeneous Clusters -- 20.4 Resource Configuration -- 20.5 Resource Management on Clusters with Accelerators -- 20.6 Evaluation -- 20.7 Conclusion -- References -- Chapter 21 An Approach for Efficient Execution of SPMD Applications on Multicore Clusters -- 21.1 Introduction -- 21.2 SPMD Applications on Multicore Clusters -- 21.3 Methodology for Efficient Execution -- 21.4 Scalability and Efficiency of SPMD Applications -- 21.5 SPMD Applications and Performance Evaluation -- 21.6 Related Works -- 21.7 Conclusion and Future Works -- References -- Chapter 22 Operating System and Scheduling for Future Multicore and Many-Core Platforms -- 22.1 Introduction -- 22.2 Operating System Kernel Models -- 22.3 Scheduling -- References -- Glossary -- Index.

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Electronic reproduction. Ann Arbor, Michigan : ProQuest Ebook Central, 2024. Available via World Wide Web. Access may be limited to ProQuest Ebook Central affiliated libraries.

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